Archives: Articles
-
True Wireless Broadband
Mark Quartermain of Xilinx explains how the next generation of 4G digital cellular standards, Long Term Evolution, represents a significant step forward for wireless operators…and…
-
Virtex-6 HXT FPGA 100G CFP Demonstration
Anthony Torza, Sr. Technical Marketing Manager of Serial Transceivers at Xilinx, demonstrates a Virtex-6 HXT FPGAinteroperating with Finisar 100G form-factor pluggable (CFP) optics.
-
Implementing High-Speed DDR3 Memory Controllers in a Mid-Range FPGA
As system bandwidths continue to increase, memory technologies have been optimized for higher speeds and performance. The next generation family of Double Data Rate (DDR)…
-
PDN Design and FPGA Transceiver Performance
PDN designs targeting transceiver (SERDES) FPGAs require clean voltage sources with strict voltage rail requirements. This document describes the advantages of modern switching voltage regulators…
-
Teradici Success Story
Synopsys and Teradici: ASIC Prototyping Made Fast and Efficient with Synplify Premier.
-
5 Reasons to Use a Soft-Core MIPS Processor in Your Next Custom Design
Now there’s a 100 percent MIPS-compatible soft processor available just for Altera® FPGAs and HardCopy® ASICs. The MP32 is also the industry’s first soft processor that runs…
-
FPGA Configuration via Protocol
Altera’s new device configuration mode – configuration via protocol (CvP) – can be used with PCI Express® to configure the core fabric of Altera’s 28-nm Arria® V, Cyclone®…