Archives: Articles

  • When Software Flies

    When Software Flies

    Software development is still, by far, the squishiest segment of the engineering discipline. This is not because software engineers lack discipline.  Certainly some of the…

  • Sampling Some FPGA IP

    Sampling Some FPGA IP

    FPGAs are a series of pipes. They’re not something you just dump something on. They’re not a big truck. If you don’t understand that, those…

  • USB Goes Vertical

    USB Goes Vertical

    USB is moving up in the world. Specifically, it’s going vertical. There are plenty of board-level standards out there and even more companies that support…

  • Next-Generation 65nm FPGAs

    Next-Generation 65nm FPGAs

    System Design Challenge: Bigger, Faster, Better We are on the cusp of a major technology revolution today. All the buzzwords of yesteryear; digital convergence, triple…

  • ABCs of ESC

    ABCs of ESC

    Embedded Systems Conference 2007 in San Jose has ended, but we have devised a devious database of alphabetically arranged alliterative announcements to alleviate any anxiety…

  • Smaller is Bigger

    Smaller is Bigger

    The San Jose version of the Embedded Systems Conference (ESC) in this year began with Al Gore throwing down the gauntlet.  Socially and environmentally conscious…

  • Bigger, Faster, More Connected

    Bigger, Faster, More Connected

    Embedded Systems have tracked the progress in desktop and enterprise computing, only faster. Development practices and standards have been much slower to mature, however, and…

  • ArcticLink

    ArcticLink

    You’re designing a new handheld device. You’ve got your processor picked, your software platform selected, your debugger dialed-in, and your battery bolted into place. Marketing…

  • Cyclone III

    Cyclone III

    Power, Price, and Performance – in the old days, every new click of Moore’s law gave us all three, automatically.  Shrink the gates and you…

  • ARM Optimizes for FPGA

    ARM Optimizes for FPGA

    “The translation of a conception, which was at the beginning, which is intended for ASIC in a FPGA, can poor and ineffective results give.” So…