Archives: Articles
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Adrift…
A moment later, it was gone. The mark – their goal for their next leg of the race – had unceremoniously sunk into the sea,…
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Sensible SerDes at Sixty Five
At first, high speed serial I/O was a checkbox item in FPGAs – either you had it or you didn’t. FPGA vendors bolted transceivers onto…
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Power Parallelism
Computing architectures have reached a critical juncture. The monolithic microprocessor has collided with the thermal wall with a resounding, “Ouch! That’s too hot!” Traditional processor…
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Making the MOST
In the good old days, people knew what a LUT was. Why, when I was a design engineer, we taped out our design on glass…
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It’s All About Us
Three years and over one-hundred-fifty editions ago, the first copy of FPGA Journal rolled off the virtual presses, coursing its way through the digital jungle…