Archives: Articles
-
Just What is Algorithmic Synthesis?
In a traditional FPGA design flow, crafting the hardware architecture and writing VHDL or Verilog for RTL synthesis requires considerable effort. The code must follow…
-
More and Moore
Price, Performance, and Power – the three Ps of Moore’s Law — have fueled four decades of technological fury. Each new process node brought us…
-
Need More Performance?
Extracting higher performance from today’s FPGA-based systems involves much more than just cranking up the clock rate. Typically, one must achieve a delicate balance between…
-
Looking Inside
As FPGAs grow faster and more powerful, our natural inclination is to scrape more and more functionality off our boards and cram it into our…
-
Saving Supercomputing with FPGAs
Massive racks of parallel processing Pentiums, Opterons, and Itaniums wasted watts at an unprecedented pace last week on the show floor at Supercomputing 2005 in…
-
Assemble All Ye IP
There are two levels of DSP design. First, there’s the conceptual level, where hard-core algorithm development rules the day. Your big concern here is the…