Category: Semiconductor

Semiconductor/IC

  • A new way to do metal

    I noticed an interesting release courtesy of Leti, the French research consortium. It concerns a new way of depositing metal that looks so easy that…

  • The Veil is Lifted on Methodics.Com

    You may remember something of a kerfuffle about Methodics, which uses the methodics-da.com domain, finding that a page at methodics.com that said that Methodics was…

  • The Clouds Converge

    We’ve been watching the cloud computing space, and Synopsys has been playing a visible role in exploring the public cloud for compute resource elasticity during…

  • Photonics at Leti

    CEA-Leti, a French research consortium, reviewed their technology projects during Semicon West last week. I got a chance to speak with Leti’s Hughes Metras afterwards…

  • A New Spin on Logic

    Way back in 2008, we took a look at MRAM technology. As a brief review, you may recall that Crocus in particular takes advantage of…

  • The Old Switcheroo

    Way back in 2004, during the Vice Presidential debate, Dick Cheney urged listeners to go to “factcheck.com” to confirm that the campaign spin-checking organization would…

  • Sorting Through the Rubble

    Roughly a year ago we talked about Vennsa’s OnPoint tool for identifying what went wrong during verification when something goes wrong. I got an update…

  • Custom Chip Planning

    Digital designers have had semi-automated design flows for a long time; custom and analog designers, not so much. Pulsic recently announced that they’re taking some…

  • Chip Design Tweaker

    Last-minute chip design changes are always unfortunate, whether right before cutting masks or, worse yet, after you get silicon back. Some major tool environments provide…

  • Another Way to Test Your 3D ICs

    A couple months back we looked at Mentor’s approach to testing 3D ICs. Cadence and Imec have recently announced an automated solution for testing 3D…