Archives: Chalk Talks
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Stratus™ High-Level Synthesis
High-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than…
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Announcing Indago Debug Platform
Debugging your design should be a lot more sophisticated than a bunch of “printf” statements. But that is exactly what many development teams end up…
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Top 10 Reasons Real Signal Integrity Engineers Demand Power-Aware SI Technology
Signal Integrity analysis that doesn’t consider power effects can set you up for some dangerous problems. Ground bounce and other effects can cause problems that…
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Genus Synthesis Solution: Massively Parallel RTL Synthesis
Synthesis of large designs can be a major bottleneck, particularly with the number of iterations often required and the long synthesis runtimes of current generation…
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Tensilica Fusion DSP for IoT, Wearables, Communications
IoT and wearable designs often require big DSP processing power on a tiny energy budget. But, conventional processors are not well suited to these kinds…
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Meet PPA and Turnaround Time Requirements at Advanced Nodes with Innovus Implementation System
Today’s complex IC designs demand a new generation of high-capacity, high-performance implementation tools. In this episode of Chalk Talk, Amelia Dalton chats Yufeng Luo of…