Archives: Chalk Talks
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Integrated Interlaken operating at 150 Gb/s in UltraScale FPGAs
This Virtex® UltraScale™ FPGA demonstration shows the newly integrated Interlaken IP core running at 150Gb/s over 12 lanes. By integrating Interlaken, Xilinx is able to…
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Virtex UltraScale VU440 FPGA Demonstration
See the new Virtex® UltraScale™ VU440, the world’s largest FPGA, in action being used to prototype 10 ARM® Cortex®-A9 CPUs.
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Model-Based Design for Xilinx Zynq & Altera SoC Devices
You’ll get way more out of your Xilinx Zynq or Altera SoC device if you have a smooth design flow from MATLAB and Simulink. Luckily,…
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Cadence Perspec System Verifier SW Driven SoC Verification Automation
To verify your next system design, you’ll need a lot of use cases. But, creating, tracking, sharing, and running those use cases can be a…
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Mixed Signal Verification: The Long and Winding Road
Verification of your mixed-signal design can be a nightmare, with clashing disciplines and engineering cultures, and challenging use-case requirements. In this episode of Chalk Talk,…