Archives: News
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GiDEL Announces the Availability of TotalHistoryâ„¢ a New Level in ASIC Prototyping and FPGA Debug
Kane Computing are pleased to announce that GiDEL has recently launched TotalHistory™, the most advanced debugging feature available in today’s ASIC Prototyping solutions and FPGA…
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GiDEL Announces Its Third-Generation ASIC Prototyping Systems Based on on Altera’s Stratix IV E FPGAs
Kane Computing are pleased to announce that GiDEL recently launched the PROC_SoC3-4S™ and the PROC_SoC10-4S™ ASIC Prototyping Systems utilizing the industry’s largest FPGAs – Altera’s…