Implementing Floating-Point DSP in an FPGA

Are you finding it challenging to efficiently implement floating-point digital signal processing (DSP) algorithms? Learn how Altera’s new floating-point design flow makes it easy and enables your designs to achieve high performance and efficiency.

Watch this 30-minute webcast to find out about:

• How Altera^® FPGAs solve floating-point challenges
• Altera’s model-based tool flow using our DSP Builder Advanced Blockset and the MATLAB and Simulink tools from MathWorks
• A third-party white paper from BDTI, an independent technology analysis firm, that analyzes our floating-point DSP design flow