Archives: Articles
-
Methods and Tools for Bring-Up and Debug of an FPGA-Based ASIC Prototype
Software simulation of RTL is no longer capable of providing all of the verification required for today’s complex ASIC designs. Modern ASICs are a complex…
-

The Process of Process Tracking
Want to scare an engineer? There’s an easy weapon out there. And it consists of only one word. “Process.” Process is supposed to mean that…
-

An EDA Foil Hat
We are all under attack. Don’t bother hiding the kids; there is no escape. Well, not much, anyway. A foil hat won’t be enough to…
-

Power When You Need It
Warning! We are going to say the “C” word in this article. If you can’t take it, just stop reading now and save yourself a…
-

True 3D MEMS
Everyone is jumping on the 3D bandwagon. But if I said that MEMS was just taking some steps in that direction, you might understandably question…
-

Verifying Today’s SoCs Requires a New Approach
As is well known, the system-on-chip (SoC) verification problem grows faster than design size, so it takes more time and effort to verify a complete…




