The Five Pitfalls of 4G Baseband Design

There’s a bandwidth explosion taking place in mobile communications. Under the broad umbrella of the ITU’s IMT-2000 set of 3G cellular communications standards, cellular data rates have risen from a few tens of kilobits to megabits per second, to tens of megabits per second, and now to hundreds of megabits per second with even higher levels of performance expected for fixed-location applications.

What does a LTE baseband subsystem look like? This white paper examines the most important elements of a LTE subsystem. The two biggest challenges are (1) the need to implement complex new LTE technologies and algorithms such as OFDM and MIMO, and (2) the absolute level of computation required.

There are many pitfalls associated with developing cost-effective LTE hardware and getting the performance required. To make LTE ubiquitous and make it profitable, design teams need to develop one or more low-cost SOCs with the required performance and flexibility. Computational engines capable of executing hundreds of thousands to billions of MIPS must be implemented with very small silicon budgets in very small physical spaces.

LTE implementation requirements affect both the overall economics and silicon technology. From an economic standpoint, low-cost implementations result in very high sales volumes driven by increased mobility for all kinds of products that can gainfully exploit high-bandwidth communications. If 4G communications costs drop low enough, high-bandwidth wireless connectivity will essentially become mandatory across many of different application platforms: communications, entertainment, computing, embedded, and many other forms of machine-to-machine communications.

Much of this connectivity, measured by sales volume, will go into cost-sensitive applications and cost-sensitive regions. So design teams must work hard to drive the hardware cost of a terminal’s connectivity below $5. That’s a hard problem, given the level of computing and technological sophistication involved.

That cost constraint translates into silicon implementations that consume no more than 20 mm² of silicon—resulting in a silicon cost of $1 or 2 per chip for the digital portion of the LTE communications subsystem. Through its work on LTE baseband design, Tensilica has established is that flexible LTE PHYs can be built with relatively small silicon footprints. But there are several potential pitfalls involved!