Archives: News
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Cadence Significantly Accelerates Chip Design With New Virtuoso Layout Suite for Electrically Aware Design
SAN JOSE, CA–(Marketwired – July 10, 2013) – Cadence Design Systems (NASDAQ: CDNS) HIGHLIGHTS:Cadence Design Systems (NASDAQ: CDNS) Cadence Virtuoso Layout Suite Electrically Aware Design (EAD) can save engineers…
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Imec reveals method of damage free cryogenic etching of ultralow-k dielectrics
SEMICON WEST, San Francisco (USA) – July 09, 2013 – Imec today announced a cryogenic etching method that protects the surface of porous ultralow-k dielectrics against excessive…
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Fujitsu Laboratories Implements Custom Processor for 3G/LTE Modem with Synopsys’ Processor Designer
MOUNTAIN VIEW, Calif., July 9, 2013 /PRNewswire/ Highlights Synopsys Processor Designer™ tool enables rapid exploration of processor architectures to optimize for performance, power and area Fujitsu Laboratories…
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Leti’s IDEAL and IMAGINE Programs Demonstrate Cost-effective Solutions to Extend 193nm Immersion Lithography for 1X Nodes
GRENOBLE, France – July 9, 2013 – CEA-Leti said today that its multi-partner programs, IDEAL and IMAGINE, have demonstrated cost-effective solutions that extend 193nm immersion lithography for…
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Xilinx Tapes-Out First 20nm All Programmable Device with First UltraScale ASIC-class Programmable Architecture
SAN JOSE, Calif., July 9, 2013 – Xilinx, Inc. (NASDAQ: XLNX) announced two more industry firsts at 20nm, expanding on a series of industry innovations started…
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Cadence Solutions Enable Successful Tape Out of 20-Nanometer SoC Test Chip by Global Unichip Corporation
SAN JOSE, CA–(Marketwired – July 09, 2013) – Cadence Design Systems (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that the design services company,…